20–30 GHz mixer-first receiver in 45-nm SOI CMOS

Abstract

A 20-30 GHz mixer-first receiver implemented in 45-nm SOI CMOS is presented. The receiver employs four-phase passive mixing with input inductor to realize tunable impedance matching up to 30 GHz. The receiver achieves an 8-dB noise figure with reconfigurable 8.9 to 20.6-dB conversion gain and 2:1 impedance tuning range. Input 1-dB compression point ranges from -13 to -9.3 dBm and power consumption is 41 mW.