{"title":"A Ka-band 2-Stage Transformer-Coupled Power Amplifier in 0.13-µm SiGe BiCMOS Technology","authors":"Ling Li, Kenan Xie, Tongxuan Zhou, Haitang Dong, Hao Zhang, Keping Wang","doi":"10.1109/ucmmt53364.2021.9569869","DOIUrl":null,"url":null,"abstract":"This paper presents a 30-to-40 GHz 2-stage power amplifier (PA) for 5G applications. Transformers are used to achieve a broad input, output and interstage matching while occupying a compact size. The neutralization technique is used to boost the power gain and improve stability of PA. According to the simulation results, the power amplifier achieves an output 1dB compression point (OP1dB) of 14.9 dBm and a saturated output power of 17.4 dBm with a peak power added efficiency (PAE) of 39% at 35 GHz. The gain is larger than 30 dB from 30–40 GHz. Implemented in a 0.13-µm SiGe BiCMOS process, the overall chip size is 0.46 mm2 including all RF and DC pads.","PeriodicalId":117712,"journal":{"name":"2021 14th UK-Europe-China Workshop on Millimetre-Waves and Terahertz Technologies (UCMMT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 14th UK-Europe-China Workshop on Millimetre-Waves and Terahertz Technologies (UCMMT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ucmmt53364.2021.9569869","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a 30-to-40 GHz 2-stage power amplifier (PA) for 5G applications. Transformers are used to achieve a broad input, output and interstage matching while occupying a compact size. The neutralization technique is used to boost the power gain and improve stability of PA. According to the simulation results, the power amplifier achieves an output 1dB compression point (OP1dB) of 14.9 dBm and a saturated output power of 17.4 dBm with a peak power added efficiency (PAE) of 39% at 35 GHz. The gain is larger than 30 dB from 30–40 GHz. Implemented in a 0.13-µm SiGe BiCMOS process, the overall chip size is 0.46 mm2 including all RF and DC pads.