High density, low cost packaging and interconnect technology

Abstract

The increase of I/O on chip is driving chip, package and board interconnect schemes to alternative technologies. Area array flip chips and BGAs are beginning to replace peripheral pad limited chips and tight pitch leads on PQFPs. The PWB industry is looking at technologies which form "microvias" to handle the interconnection of these high density chip/package formats. New technologies such as large area processing (LAP) and seamless high off chip connectivity (SHOCC) are being developed to meet these needs.