Extraction of bias dependent access resistances of advanced MOSFETs

Abstract

Adequate modeling of Ultra-Thin Body and BOX Fully Depleted Silicon-on-Insulator (UTBB FD-SOI) transistor for RF applications requires accurate extracted values of all equivalent circuit elements from S-parameters measurements. This paper proposes an original direct extraction method for determining all MOSFET extrinsic and intrinsic elements values. The method is built up on two main observations: first, the independent gate resistance value with DC bias condition, and second, the bias variations of the drain/source resistances extracted from S-parameters measurements at any operating bias conditions. The new extraction method uses linear regression techniques on parametric curves defined by the real parts of the transistor Z-matrix.