Reinhardt: Real-time Reconfigurable Hardware Architecture for Regular Expression Matching in DPI

Taejune Park, Jaehyun Nam, S. Na, Jaewoong Chung, Seungwon Shin
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引用次数: 3

Abstract

Regular expression (regex) matching is an integral part of deep packet inspection (DPI) but a major bottleneck due to its low performance. For regex matching (REM) acceleration, FPGA-based studies have emerged and exploited parallelism by matching multiple regex patterns concurrently. However, even though guaranteeing high-performance, existing FPGA-based regex solutions do not still support dynamic updates in run time. Hence, it was inappropriate as a DPI function due to frequently altered malicious signatures. In this work, we introduce Reinhardt, a real-time reconfigurable hardware architecture for REM. Reinhardt represents regex patterns as a combination of reconfigurable cells in hardware and updates regex patterns in real-time while providing high performance. We implement the prototype using NetFPGA-SUME, and our evaluation demonstrates that Reinhardt updates hundreds of patterns within a second and achieves up to 10 Gbps throughput (max. hardware bandwidth). Our case studies show that Reinhardt can operate as NIDS/NIPS and as the REM accelerator for them.
DPI中正则表达式匹配的实时可重构硬件架构
正则表达式(regex)匹配是深度包检测(DPI)的重要组成部分,但由于其性能低下而成为瓶颈。对于正则表达式匹配(REM)加速,基于fpga的研究已经出现,并通过并行匹配多个正则表达式模式来利用并行性。然而,即使保证高性能,现有的基于fpga的regex解决方案仍然不支持运行时的动态更新。因此,由于恶意签名经常被更改,因此不适合作为DPI功能。在这项工作中,我们介绍了Reinhardt,一种用于REM的实时可重构硬件架构。Reinhardt将正则表达式模式表示为硬件中可重构单元的组合,并在提供高性能的同时实时更新正则表达式模式。我们使用NetFPGA-SUME实现了原型,我们的评估表明Reinhardt在一秒钟内更新了数百个模式,并实现了高达10 Gbps的吞吐量(最大)。硬件带宽)。我们的案例研究表明,Reinhardt可以作为NIDS/NIPS以及它们的REM加速器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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