Fault-tolerant gamma interconnection networks

N. Tzeng, Po-Jen Chuang
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引用次数: 5

Abstract

Modifications to the gamma interconnection network (GIN), which is composed of 3*3 basic building blocks, with interconnecting patterns between stages following the plus-minus-2/sup i/ functions, are discussed. The gamma network is modified by altering the interconnecting patterns between stages so as to create totally disjoint paths from any source (S) to any destination (D), ensuring high terminal reliability between every (S, D) pair. The network is called fault-tolerant GIN (FTGIN) since it can tolerate an arbitrary single fault. If several building blocks (i.e. 3*3 switches) are fabricated in one VLSI chip, the layout area and pin count are smaller for the FTGIN than for its GIN counterpart as a result of the change in the interconnection patterns, offering potential cost reduction. A lower bound on the terminal reliability of the FTGIN is derived, showing significant terminal reliability improvement over the conventional gamma network.<>
容错伽马互连网络
讨论了对由3*3基本构建块组成的伽马互连网络(GIN)的改进,GIN的级间互连模式遵循正负2/sup i/函数。通过改变级之间的互连模式来修改伽马网络,从而创建从任何源(S)到任何目标(D)的完全不相交的路径,确保每个(S, D)对之间的高终端可靠性。这种网络被称为容错GIN (FTGIN),因为它可以容忍任意的单个故障。如果在一个VLSI芯片中制造几个构建模块(即3*3开关),由于互连模式的变化,FTGIN的布局面积和引脚数比GIN的对应产品要小,从而提供潜在的成本降低。推导了FTGIN的终端可靠性下界,表明与传统伽马网络相比,FTGIN的终端可靠性有了显著提高
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