{"title":"A Novel High Performance Atto-Ampere Current Mirror","authors":"H. F. Baghtash, K. Monfaredi, S. J. Azhari","doi":"10.1109/ICSAP.2010.16","DOIUrl":null,"url":null,"abstract":"in this paper is proposed a novel atto-ampere current mirror (AACM) which reaches the minimum yet reported current range of 0.4aA. Operation of this circuit is based on source voltage modulation instead of conventionally used gate voltage modulation which interestingly prevents usage of commonly required voltage shifting in those circuits. The proposed circuit has a simple structure prohibiting large chip area consumption. The proposed current mirror is the best choice for ultra low power low voltage (ULPVL) applications. Simulation results in TSMC 0.18µm CMOS technology with Hspice are presented to demonstrate the validation of the proposed current mirror.","PeriodicalId":303366,"journal":{"name":"2010 International Conference on Signal Acquisition and Processing","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Conference on Signal Acquisition and Processing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSAP.2010.16","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
in this paper is proposed a novel atto-ampere current mirror (AACM) which reaches the minimum yet reported current range of 0.4aA. Operation of this circuit is based on source voltage modulation instead of conventionally used gate voltage modulation which interestingly prevents usage of commonly required voltage shifting in those circuits. The proposed circuit has a simple structure prohibiting large chip area consumption. The proposed current mirror is the best choice for ultra low power low voltage (ULPVL) applications. Simulation results in TSMC 0.18µm CMOS technology with Hspice are presented to demonstrate the validation of the proposed current mirror.