A Capacitor-less LDO with Fast transient response using Push-Pull Buffer

Qiang Li, Kai Wang, Jian-jun Zhao
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引用次数: 7

Abstract

This paper presents a fast transient capacitor-less low-dropout regulator (LDO). A Push-Pull Buffer (PPB) is proposed to drive the pass transistor. The low output resistance of the PPB allows the pole at the gate of the pass transistor to be pushed beyond the unity-gain frequency of the LDO regulation loop. Transient response is improved, the settling time of LDO are $0.2\mu \mathrm{S}\text{@} \mathrm{C}_{\mathrm{L}}=0\mathrm{p}$F and $1.14\mu \mathrm{S}\text{@}\mathrm{C}_{\mathrm{L}}=100\mathrm{p}$F. The input transistors of error amplifier are realized Cascode structure which is used for connecting compensation capacitor Cc. With this structure, RHP zero generated by compensation capacitor is pushed beyond the unity-gain frequency of the LDO regulation loop. And LHP zero generated by the Cc is used to compensate the non-dominate poles. Compensation capacitance is 1pF. The Dynamic Transient Improvement (DTI) circuit is adopted to reduce the ripples of the output voltage of LDO. The proposed LDO can operate from a supply voltage of 2.2V-4V with a minimum dropout voltage of 0. 2V at a maximum 50mA load and quiescent current of 70$\mu$A. Only 4pF capacitor is integrated in the chip, the output of LDO can be connected 0- 100pF off-chip capacitor.
一种基于推挽缓冲器的快速瞬态响应无电容LDO
本文提出了一种快速的瞬态无电容低差稳压器(LDO)。提出了一种推挽缓冲器(PPB)来驱动通管。PPB的低输出电阻允许通极晶体管栅极的极被推到超过LDO调节回路的单位增益频率。暂态响应得到改善,LDO的沉降时间为$0.2\mu \ mathm {S}\text{@}\ mathm {C}_{\ mathm {L}}=0\ mathm {p}$F和$1.14\mu \ mathm {S}\text{@}\ mathm {C}_{\ mathm {L}}=100\ mathm {p}$F。误差放大器的输入晶体管采用级联码结构,通过连接补偿电容Cc,将补偿电容产生的RHP零推至LDO调节回路的单位增益频率之外。由Cc产生的LHP零被用来补偿非主导极点。补偿电容为1pF。采用动态暂态改进(DTI)电路来减小LDO输出电压的纹波。所提出的LDO可以在2.2V-4V的电源电压下工作,最小降压为0。2V,最大负载50mA,静态电流70 μ a。芯片内仅集成4pF电容,LDO输出端可连接0- 100pF片外电容。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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