Sensitivity of FPGA power evaluation

Abstract

Power dissipation is becoming a major concern among FPGA vendors. Recently, architectural studies have been published which attempt to quantify the effects of various architectural alternatives on the power dissipation of FPGAs. These studies are very sensitive to assumptions made during the experimentation. In this paper, we analyze the sensitivity of two of these assumptions: the primary input density and the routing algorithm. We show that both of these assumptions significantly impact the architectural results.