A 42mW 26–28 GHz phased-array receive channel with 12 dB gain, 4 dB NF and 0 dBm IIP3 in 45nm CMOS SOI

Abstract

This paper presents a low-power 26-28 GHz phased-array receive channel in 45nm CMOS SOI. The design alternates cascode amplifiers with switched-LC phase-shifter cells to result in 5-bit phase control with gain and rms phase error <; 0.6 dB and 4°, respectively, over 32 phase states. The measured gain, noise figure (NF) and IIP3 are 12.2 dB, 4 dB and 0 dBm, respectively, and are achieved at a DC power of 42 mW. A gain control of 6-dB is also available without affecting the system NF. To our knowledge, this represents state-of-the-art in mm-wave phased-arrays with the best published linearity at low NF. Application areas include 5G base-stations and hand-held units.