{"title":"A parallel iterative routing algorithm based on local current comparison method-application of associative silicon retina","authors":"Gui-Xin Cheng, Mamoru Tanaka","doi":"10.1109/CICCAS.1991.184441","DOIUrl":null,"url":null,"abstract":"Proposes a new constructive parallel iterative routing method to solve the speed and routing quality problems in conventional routers such as the maze router and linear-expansion router, This method is based on selecting local maximum current in an Unity Resistive Network (URN) whose principle is to obtain the 'field' expressed with Poisson equation. Because all nets are routed in parallel, both problems can be solved to some extent. As the routing grid plane is represented by URN i.e. silicon retina, the present algorithm is suitable for hardware implementation by analog circuit and digital circuit. Experiment results showed the efficiency of the proposed method.<<ETX>>","PeriodicalId":119051,"journal":{"name":"China., 1991 International Conference on Circuits and Systems","volume":"76 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"China., 1991 International Conference on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICCAS.1991.184441","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Proposes a new constructive parallel iterative routing method to solve the speed and routing quality problems in conventional routers such as the maze router and linear-expansion router, This method is based on selecting local maximum current in an Unity Resistive Network (URN) whose principle is to obtain the 'field' expressed with Poisson equation. Because all nets are routed in parallel, both problems can be solved to some extent. As the routing grid plane is represented by URN i.e. silicon retina, the present algorithm is suitable for hardware implementation by analog circuit and digital circuit. Experiment results showed the efficiency of the proposed method.<>