A 28 GHz-Band Direct RF Undersampling S/H CMOS IC with 40 dB SNR

Nagahiro Yoshino, K. Norishima, M. Motoyoshi, S. Kameda, N. Suematsu
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引用次数: 3

Abstract

We have studied direct RF undersampling reception to reduce the size and power consumption. We already developed a series/shunt switching type sample and hold (S/H) integrated circuit (IC) by using 90 nm complementary metal oxide semiconductor (CMOS) process for Ka-band (19.4 - 20.2 GHz) very small aperture terminal (VSAT) application. This IC performed signal-to-noise ratio (SNR) of higher than 27.3 dB. For the higher frequency operation and the reception of multi-level modulated signal, the SNR improvement will be required. In this paper, a 28 GHz-band S/H IC with higher SNR has been developed. In order to improve SNR at higher RF frequency, 65 nm CMOS process is introduced to enhance the switching speed of sampling, the size of hold capacitor is optimized and the two-stage output buffer amplifier is employed. The fabricated S/H IC performs the SNR of higher than 41.2 dB and the error vector magnitude (EVM) of 4.4% (32 Mbaud 64 quadrature amplitude modulation (QAM)) in 28 GHz-band.
一种具有40db信噪比的28ghz频段直接射频欠采样S/H CMOS集成电路
我们研究了直接射频欠采样接收以减小尺寸和功耗。我们已经采用90 nm互补金属氧化物半导体(CMOS)工艺开发了一种用于ka波段(19.4 - 20.2 GHz)极小孔径终端(VSAT)应用的串联/并联开关型样品和保持(S/H)集成电路(IC)。该集成电路的信噪比(SNR)高于27.3 dB。对于更高频率的工作和多级调制信号的接收,需要提高信噪比。本文研制了一种具有较高信噪比的28 ghz波段信噪比集成电路。为了提高高频下的信噪比,采用65 nm CMOS工艺提高采样开关速度,优化保持电容尺寸,采用两级输出缓冲放大器。所制备的S/H集成电路在28 ghz频段的信噪比高于41.2 dB,误差矢量幅度(EVM)为4.4% (32 Mbaud 64正交调幅(QAM))。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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