Sneha M Hiremath, Satyadhyan Chickerur, Joel Dandin, Mihir Patil, Bhoomi Muddinkoppa, Shreerama Adakoli
{"title":"Open-source Hardware: Different Approaches to Softcore implementation","authors":"Sneha M Hiremath, Satyadhyan Chickerur, Joel Dandin, Mihir Patil, Bhoomi Muddinkoppa, Shreerama Adakoli","doi":"10.1109/DISCOVER55800.2022.9974836","DOIUrl":null,"url":null,"abstract":"Since the last few years, open-source hardware is preferred in the landscape of hardware development. Originally proprietary hardware was only developed by big multinational companies like AMD, Intel, and NVIDIA, which were expensive and general-purpose. Due to this, people started developing their own hardware. Open-source hardware has support from the opensource community, is developed at low cost, and has presently got a lot of support from developers and enthusiasts. Softcore is a microprocessor that can be implemented on FPGA using logic synthesis and can be fabricated as open-source hardware. This paper focuses on how various approaches to softcore implementation can be done on FPGA which would involve logic cells, CLBs, LUTs, RAM, etc. The soft cores which are built upon the RISC-V ISA, namely VexRISCV and RISC-V BOOM, as well as the softcores adhering to the POWER ISA, such as Microwatt and LibreSoC, are the main topics of discussion. These softcores are installed and simulated. To test the working of the ISA, some standard test cases and test suites are executed. Hardware implementation is done by porting the softcore onto a Xilinx Nexys A7-100T FPGA board.","PeriodicalId":264177,"journal":{"name":"2022 International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics ( DISCOVER)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics ( DISCOVER)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DISCOVER55800.2022.9974836","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Since the last few years, open-source hardware is preferred in the landscape of hardware development. Originally proprietary hardware was only developed by big multinational companies like AMD, Intel, and NVIDIA, which were expensive and general-purpose. Due to this, people started developing their own hardware. Open-source hardware has support from the opensource community, is developed at low cost, and has presently got a lot of support from developers and enthusiasts. Softcore is a microprocessor that can be implemented on FPGA using logic synthesis and can be fabricated as open-source hardware. This paper focuses on how various approaches to softcore implementation can be done on FPGA which would involve logic cells, CLBs, LUTs, RAM, etc. The soft cores which are built upon the RISC-V ISA, namely VexRISCV and RISC-V BOOM, as well as the softcores adhering to the POWER ISA, such as Microwatt and LibreSoC, are the main topics of discussion. These softcores are installed and simulated. To test the working of the ISA, some standard test cases and test suites are executed. Hardware implementation is done by porting the softcore onto a Xilinx Nexys A7-100T FPGA board.