VSWR-protected silicon bipolar power amplifier with smooth power control slope

A. Scuderi, F. Carrara, G. Palmisano
{"title":"VSWR-protected silicon bipolar power amplifier with smooth power control slope","authors":"A. Scuderi, F. Carrara, G. Palmisano","doi":"10.1109/ISSCC.2004.1332660","DOIUrl":null,"url":null,"abstract":"A 1.8 GHz silicon bipolar PA is presented. A protection circuit enables the amplifier to sustain a 10:1 load VSWR at 5 V supply despite a low BV/sub ceo/ of 6.5 V. A temperature-compensated bias network allows a moderate power-control slope of less than 80 dB/V. A 50% PAE is attained at a 33.8 dBm output power level. The 1.2/spl times/1.5 mm/sup 2/ die is implemented in 0.8 /spl mu/m BiPMOS.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2004.1332660","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13

Abstract

A 1.8 GHz silicon bipolar PA is presented. A protection circuit enables the amplifier to sustain a 10:1 load VSWR at 5 V supply despite a low BV/sub ceo/ of 6.5 V. A temperature-compensated bias network allows a moderate power-control slope of less than 80 dB/V. A 50% PAE is attained at a 33.8 dBm output power level. The 1.2/spl times/1.5 mm/sup 2/ die is implemented in 0.8 /spl mu/m BiPMOS.
具有平滑功率控制斜率的vswr保护硅双极功率放大器
介绍了一种1.8 GHz硅双极放大器。保护电路使放大器能够在5v电源下维持10:1的负载驻波比,尽管BV/sub /低至6.5 V。温度补偿偏置网络允许小于80 dB/V的中等功率控制斜率。在33.8 dBm输出功率水平下达到50%的PAE。1.2/spl倍/1.5 mm/sup 2/芯片实现在0.8 /spl mu/m BiPMOS中。
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