{"title":"Issues of integrating the IEEE Std 1149.1 into a gate array","authors":"Robert Cortez, R. Dandapani, Mike Yeager","doi":"10.1109/VTEST.1991.208139","DOIUrl":null,"url":null,"abstract":"Use of boundary-scan to test systems at the production and field levels has taken on a greater importance due to the development of surface mount technology. The IEEE Standard 1149.1 offers a documented approach to the implementation of boundary-scan. United Technologies Microelectronics Center (UTMC) integrated the standard into an ASIC gate array; this paper presents that implementation and addresses issues arising from the integration not covered specifically in the standard.<<ETX>>","PeriodicalId":157539,"journal":{"name":"Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTEST.1991.208139","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Use of boundary-scan to test systems at the production and field levels has taken on a greater importance due to the development of surface mount technology. The IEEE Standard 1149.1 offers a documented approach to the implementation of boundary-scan. United Technologies Microelectronics Center (UTMC) integrated the standard into an ASIC gate array; this paper presents that implementation and addresses issues arising from the integration not covered specifically in the standard.<>