{"title":"Studying Victim Caches in GPUs","authors":"E. Taylor, D. W. Chang","doi":"10.1109/PDP2018.2018.00069","DOIUrl":null,"url":null,"abstract":"Today Graphics Processing Units (GPUs) are being used for more than traditional graphics processing. Large super computers such as Titan are utilizing GPUs to solve problems that have little resemblance to their original purpose. To improve the performance of these applications, GPU architects are increasing cache sizes to lower latencies of non-uniform memory references found in these programs. In this paper, we investigate an alternative approach where a victim buffer is added to the first level cache. Our studies show that a 256-line victim cache can increase L1 hit rate by 15% and improve IPC by 7.5% over the baseline. This victim cache outperforms increasing the cache size by 400% while being a less costly solution in terms of area.","PeriodicalId":333367,"journal":{"name":"2018 26th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2018-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 26th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PDP2018.2018.00069","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Today Graphics Processing Units (GPUs) are being used for more than traditional graphics processing. Large super computers such as Titan are utilizing GPUs to solve problems that have little resemblance to their original purpose. To improve the performance of these applications, GPU architects are increasing cache sizes to lower latencies of non-uniform memory references found in these programs. In this paper, we investigate an alternative approach where a victim buffer is added to the first level cache. Our studies show that a 256-line victim cache can increase L1 hit rate by 15% and improve IPC by 7.5% over the baseline. This victim cache outperforms increasing the cache size by 400% while being a less costly solution in terms of area.