Testing of a low inductance stacked mosfet switch for Pulsed Ring Down Sources

D. Realey, J. Mankowski, S. Holt, J. Walter, J. Dickens
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引用次数: 4

Abstract

An inexpensive and mobile array of Pulsed Ring Down Sources (PRDS) were required to verify previous simulation results. Initial attempts to use a stacked MosFET circuit as a closing switch were unsuccessful due to the additional series inductance of the MosFET stack lowering the frequency of the oscillation on the coaxial radiator. Experimental results showed that by reducing the parasitic inductance due to the geometry of the MosFET stack, the frequency of the oscillation could be increased. Increased series resistance due to the stacked MosFETs was also a concern. In order to minimize the parasitic inductance of the stack and allow for multiple stacks to be connected in parallel, a printed circuit board was designed. Results from testing of the original switch stacks and board assembly are presented and compared with PSPICE simulations. Using the simulation results, the reduction in parasitic inductance can be estimated.
用于脉冲环灭源的低电感堆叠式most效应晶体管开关的测试
为了验证之前的仿真结果,需要一种廉价且可移动的脉冲环下源阵列。最初尝试使用堆叠的MosFET电路作为闭合开关是不成功的,因为MosFET堆叠的附加串联电感降低了同轴散热器上振荡的频率。实验结果表明,通过减小由于MosFET堆叠的几何结构引起的寄生电感,可以提高振荡的频率。由于堆叠的mosfet而增加的串联电阻也是一个问题。为了减小堆叠的寄生电感并允许多个堆叠并联,设计了一种印刷电路板。给出了原始开关栈和电路板组件的测试结果,并与PSPICE模拟结果进行了比较。利用仿真结果,可以估计寄生电感的减少。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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