A new 600V partial SOI LDMOS with step-doped drift region

Abstract

A new 600V Partial Silicon-on-Insulator (PSOI) lateral double-diffused metal-oxide-semiconductor (LDMOS) field-effect transistor with step-doped drift region (SDD) is introduced to improve breakdown voltage (BV) and reduce on-resistance (Ron). The step-doped profile induces an electric field peak in the surface of the device, which can improve the surface field distribution and the doping accommodation in the drift region. The adjusted drift region can allow higher doping concentration under the drain end which results in higher breakdown voltage, and accommodate more impurity atoms as a whole which provides more electrons to support higher current and thus reduce on-resistance. The proposed LDMOS transistor with SDD in partial PSOI (SDD-PSOI) is analyzed by 2-D numerical simulations, compared with conventional SOI (CSOI) and conventional PSOI (CPSOI) LDMOS transistors. The results indicate that the proposed structure can significantly improve BV up to 607V and reduce on-resistance by 12.6% in comparison to CPSOI.