Read-Decoupled Radiation Hardened RD-DICE SRAM Cell for Low-Power Space Applications

Mili Lavania, Neelam Surana, Ishant Anand, Joycee Mekie
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引用次数: 2

Abstract

Conventional 6T Static Random Access Memory(SRAM) cell suffers from data flip (Single event upset) due to continuous bombardment of radiation particles in the space environment. To mitigate single-event upset (SEU) which arises due to radiation, radiation-hardened SRAM cell such as dual interlocked storage cell (DICE) is proposed in the literature. However, DICE SRAM uses 4 bit-lines for the read and write operations, and which consume significantly high power when compared with the conventional 6T SRAM cell with 2 bit-lines. To resolve this issue, we propose a read-decoupled DICE SRAM cell, which uses only single bit-line for a read operation. Simulations results obtained from Spice for 1 KB SRAM array implemented in UMC 65nm and SCL 180nm technology node show that by simply decoupling read and write operation in DICE SRAM, read energy(write energy) and read delay(write delay) reduce by at least 72 %(17%) and 67%(37%) respectively. SEU results obtained from Cogenda tool show that the read-decoupled DICE is immune to radiations as is DICE.
用于低功耗空间应用的读去耦辐射硬化RD-DICE SRAM单元
由于空间环境中辐射粒子的持续轰击,传统的6T静态随机存取存储器(SRAM)单元遭受数据翻转(单事件破坏)。为了减轻由于辐射引起的单事件扰动(SEU),文献中提出了双联锁存储单元(DICE)等辐射硬化SRAM单元。然而,DICE SRAM使用4位线进行读写操作,与使用2位线的传统6T SRAM单元相比,它消耗的功率显着高。为了解决这个问题,我们提出了一个读取解耦的DICE SRAM单元,它只使用单个位行进行读取操作。Spice对UMC 65nm和SCL 180nm技术节点上实现的1kb SRAM阵列的仿真结果表明,通过简单地解耦DICE SRAM的读写操作,读取能量(写能量)和读取延迟(写延迟)分别降低了至少72%(17%)和67%(37%)。从Cogenda工具得到的SEU结果表明,读解耦的DICE与DICE一样对辐射具有免疫力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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