Yijiao Wang, Peng Huang, Xiaoyan Liu, G. Du, Jinfeng Kang
{"title":"Time dependent 3-D statistical KMC simulation of high-k degradation including trap generation and electron capture/emission dynamic","authors":"Yijiao Wang, Peng Huang, Xiaoyan Liu, G. Du, Jinfeng Kang","doi":"10.1109/SISPAD.2014.6931569","DOIUrl":null,"url":null,"abstract":"A comprehensive time dependent three dimensional simulation framework for high-k degradation is developed. In this framework, the models that account for trap generation in high-k, capture/emission dynamic, and statistical variability are incorporated in the simulation. The influence of the trap generation model on distribution of traps, threshold voltage, and the amount of trapped charge is investigated in detail, thereby lay a solid foundation for predicting more accurate design margins at circuit/system level in the future.","PeriodicalId":101858,"journal":{"name":"2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"24 4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SISPAD.2014.6931569","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A comprehensive time dependent three dimensional simulation framework for high-k degradation is developed. In this framework, the models that account for trap generation in high-k, capture/emission dynamic, and statistical variability are incorporated in the simulation. The influence of the trap generation model on distribution of traps, threshold voltage, and the amount of trapped charge is investigated in detail, thereby lay a solid foundation for predicting more accurate design margins at circuit/system level in the future.