Physical Design Considerations of One-level RRAM-based Routing Multiplexers

Xifan Tang, Edouard Giacomin, G. Micheli, P. Gaillardon
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引用次数: 8

Abstract

Resistive Random Access Memory(RRAM) technology opens the opportunity for granting both high-performance and low-power features to routing multiplexers. In this paper, we study the physical design considerations related to RRAM-based routing multiplexers and particularly the integration of 4T(ransistor)1R(RAM) programming structures within their routing tree. We first analyze the limitations in the physical design of a naive one-level 4T1R-based multiplexer, such as co-integration of low-voltage nominal power supply and high voltage programming supply, as well as the use of long metal wires across different isolating wells. To address the limitations, we improve the one-level 4T1R-based multiplexer by re-arranging the nominal and programming voltage domains, and also study the optimal location of RRAMs in terms of performance. The improved design can effectively reduce the length of long metal wires by 50%. Electrical simulations show that using a 7nm FinFET transistor technology, the improved 4T1R-based multiplexers improve delay by 69% as compared to the basic design. At nominal working voltage, considering an input size ranging from 2 to 32, the improved 4T1R-based multiplexers outperform the best CMOS multiplexers in area by 1.4x, delay by 2x and power by 2x respectively. The improved 4T1R-based multiplexers operating at near-Vt regime can improve Power-Delay Product by up to 5.8x when compare to the best CMOS multiplexers working at nominal voltage.
基于单级随机存储器的路由多路复用器的物理设计考虑
电阻式随机存取存储器(RRAM)技术为路由多路复用器提供了高性能和低功耗的特性。在本文中,我们研究了与基于rram的路由多路复用器相关的物理设计考虑因素,特别是在其路由树中集成4T(晶体管)1R(RAM)编程结构。我们首先分析了基于单电平4t1r的多路复用器物理设计的局限性,例如低压标称电源和高压编程电源的协整,以及在不同隔离井之间使用长金属线。为了解决这些限制,我们通过重新排列标称电压域和编程电压域来改进基于单电平4t1r的多路复用器,并从性能方面研究了rram的最佳位置。改进后的设计可以有效地将长金属线的长度减少50%。电学模拟表明,使用7nm FinFET晶体管技术,改进的基于4t1r的多路复用器与基本设计相比延迟提高了69%。在标称工作电压下,考虑到输入尺寸范围从2到32,改进的基于4t1r的多路复用器在面积、延迟和功率方面分别比最佳CMOS多路复用器高1.4倍、2倍和2倍。与在标称电压下工作的最佳CMOS多路复用器相比,在近vt状态下工作的改进的4t1r多路复用器可以将功率延迟积提高5.8倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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