New process for self-aligned T-gate heterostructure field-effect transistors with reduced gate length

Abstract

This paper reports on self-aligned T-gate InGaP/GaAs FETs using n/sup +//N/sup +///spl delta/(P/sup +/)/n structures. The N/sup +/-InGaP//spl delta/(P/sup +/)-InGaP/n-GaAs structure forms a planar-doped barrier. An over-etch n/sup +/-GaAs/N/sup +/-InGaP layer offers the implement of self-aligned T-gate by an highly selective etch between the InGaP and a GaAs layers. A fabricated device with an effective gate length of 1.5/spl times/100 (0.6/spl times/100) /spl mu/m/sup 2/ exhibits an extrinsic transconductance, unity-current gain frequency, and unity-power gain frequency of 78 (80) mS/mm, 9 (19.5), and 28 (30) GHz, respectively. Moreover, all proposed devices show good dc and ac linearity.