Design and Analysis of an APU for Exascale Computing

2017 IEEE International Symposium on High Performance Computer Architecture (HPCA) Pub Date : 2017-02-06 DOI:10.1109/HPCA.2017.42

T. Vijayaraghavan, Yasuko Eckert, G. Loh, M. Schulte, Mike Ignatowski, Bradford M. Beckmann, W. Brantley, J. Greathouse, Wei Huang, Arun Karunanithi, Onur Kayiran, Mitesh R. Meswani, Indrani Paul, Matthew Poremba, Steven E. Raasch, S. Reinhardt, G. Sadowski, Vilas Sridharan

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引用次数: 60

Abstract

The challenges to push computing to exaflop levels are difficult given desired targets for memory capacity, memory bandwidth, power efficiency, reliability, and cost. This paper presents a vision for an architecture that can be used to construct exascale systems. We describe a conceptual Exascale Node Architecture (ENA), which is the computational building block for an exascale supercomputer. The ENA consists of an Exascale Heterogeneous Processor (EHP) coupled with an advanced memory system. The EHP provides a high-performance accelerated processing unit (CPU+GPU), in-package high-bandwidth 3D memory, and aggressive use of die-stacking and chiplet technologies to meet the requirements for exascale computing in a balanced manner. We present initial experimental analysis to demonstrate the promise of our approach, and we discuss remaining open research challenges for the community.

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百亿亿次计算机辅助动力装置的设计与分析

考虑到内存容量、内存带宽、电源效率、可靠性和成本等预期目标，将计算推进到exaflop级别的挑战是困难的。本文提出了一种可用于构建百亿亿级系统的体系结构。我们描述了一个概念性的Exascale节点架构(ENA)，它是Exascale超级计算机的计算构建块。ENA由一个Exascale异构处理器(EHP)和一个先进的存储系统组成。EHP提供高性能加速处理单元(CPU+GPU)，封装内高带宽3D存储器，以及积极使用芯片堆叠和芯片技术，以平衡的方式满足百亿亿次计算的要求。我们提出了初步的实验分析，以证明我们的方法的承诺，我们讨论了社区仍然开放的研究挑战。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2017 IEEE International Symposium on High Performance Computer Architecture (HPCA)

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