A 4-Mbit Non-Volatile Chalcogenide Random Access Memory

L. Burcin, S. Ramaswamy, K. Hunt, J. Maimon, T. Conway, Bin Li, A. Bumgarner, G.F. Michael, J. Rodgers
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引用次数: 15

Abstract

During the first stage of a multi-year research program, BAE SYSTEMS and Ovonyx have designed, fabricated and tested a series of test chips to demonstrate full integration of a chalcogenide-based non-volatile memory element into a radiation hardened CMOS process. The test structures range from simple two- and four-point-probe material characterization macros, such as sheet resistance monitors and chalcogenide memory elements, to fully wired 64kbit memory arrays. Process integration has progressed from the previously demonstrated stand-alone chalcogenide memory elements through full memory array fabrication. Results of successful integration of the chalcogenide material used for phase-change applications in re-writable optical storage (Ge2Sb2Te5) with BAE SYSTEMS' 0.5mum radiation hardened CMOS to produce 64kbit arrays have been reported in the past. In this paper we present a description of the architecture and design of a 4Mbit, chalcogenide non-volatile memory for a 0.25mum radiation hardened CMOS process. Fabrication of the design was completed in early 2005. Electrical test results of the 4Mb chalcogenide memory hardware are presented at the conference. In addition, results from the C-RAM process transition (from BAE SYSTEMS' 0.5mum to the radiation hardened 0.25mum process) are presented
4mbit非易失性硫族随机存储器
在一项多年研究计划的第一阶段,BAE系统公司和Ovonyx公司设计、制造并测试了一系列测试芯片,以证明基于硫族化合物的非易失性存储元件完全集成到抗辐射CMOS工艺中。测试结构的范围从简单的两点和四点探针材料表征宏,如片电阻监视器和硫族化物存储器元件,到完全有线的64kbit存储器阵列。工艺集成已经从以前演示的独立硫族存储器元件发展到全存储器阵列制造。过去曾报道过将用于可重写光存储(Ge2Sb2Te5)相变应用的硫系化合物材料与BAE SYSTEMS公司的0.5mum辐射硬化CMOS成功集成以生产64kbit阵列的结果。本文介绍了一种用于0.25 μ m抗辐射CMOS工艺的4Mbit硫系非易失性存储器的结构和设计。设计的制造在2005年初完成。会议上介绍了4Mb硫族内存硬件的电气测试结果。此外,还介绍了C-RAM工艺过渡的结果(从BAE SYSTEMS公司的0.5mum过渡到辐射硬化的0.25mum工艺)
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