A non-volatile flip-flop in magnetic FPGA chip

Abstract

In this paper, the authors propose a non-volatile flip-flop, which presents simultaneously low power dissipation and high speed. This flip-flop is based on MRAM (magnetic RAM) technology on standard CMOS. In this non-volatile flip-flop design, the authors use magnetic tunnel junctions (MTJ) as storage element. Contrary to the complex sense amplifier circuit in standard MRAM circuits, a simple one based on SRAM cell is used to couple with two MTJs per bit in magnetic logic circuit. The flip-flop works exactly as a classical flip-flop hut the information is stored simultaneously in the two MTJs, which makes this flip-flop non-volatile. As the writing frequency has a strong impact on the power consumption, the MTJ writing frequency is designed to be defined by the users depending on different usage. During the startup or reset phase, the flip-flop master stage is used as the MTJ sense amplifier and the flip-flop is initialized to the previously stored state in about 200 ps. This figure has been demonstrated by electrical simulation on a 90 nm CMOS technology and with a complete and precise MTJ model