Precise control of instruction caches

Abstract

Instruction caches are usually designed to fetch the whole block from memory in case of a miss. However, the fetched blocks might contain branch instructions which if taken, will render the rest of the block useless. A novel approach is introduced, namely the Precise Control, which fetches only the words of a cache block that are likely to be used. The performance of Precise Control is evaluated and it is shown that it has a positive influence on system performance. Precise Control reduces the words fetched from memory by up to 60%, thus reducing significantly the communication overhead between cache and main memory as well as the total execution time.