A FPGA-based pulse pile-up rejection technique for the spectrum measurement in PGNAA

C. Lian, Liang Futian, Liu Yuzhe, Li Feng, Jin Ge
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引用次数: 1

Abstract

In this paper, a FPGA-based pulse pile-up rejection method for the high count rate gamma spectrometer of PGNAA is reported. By using fast peak seeking and feedback control, the pulse width can be narrowed then the pile-up events will be reduced. Test results shown that the energy resolution of the spectrometer is closed to the commercial products. For a count rate of 400 kHz, the number of pile-up events is reduced by 15.84%. This method is easy to implement in FPGAs for real-time data processing.
基于fpga的PGNAA频谱测量脉冲堆积抑制技术
本文报道了一种基于fpga的高计数率PGNAA能谱仪脉冲堆积抑制方法。通过快速寻峰和反馈控制,可以缩小脉冲宽度,从而减少堆积事件。测试结果表明,该光谱仪的能量分辨率接近于商用产品。对于400 kHz的计数率,堆积事件的数量减少了15.84%。该方法易于在fpga中实现,用于实时数据处理。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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