{"title":"Wide Input Range Single Feed RF Energy Harvester","authors":"S. Nagaveni, Bibhudatta Sahoo, A. Dutta","doi":"10.1109/NEWCAS.2018.8585489","DOIUrl":null,"url":null,"abstract":"This paper presents a hybrid single-feed CMOS rectifier for RF energy harvesting at 2.4 GHz. The proposed system achieves high power conversion efficiency across a wide input power range by reconfiguring the power paths. The architecture incorporates 3-stage reconfigurable hybrid rectifiers and each stage as regular Vth MOS rectifier for high input power and low Vth MOS rectifier for low input power. Both the rectifiers are connected in a cross-coupled manner which results in small ON-resistance and low reverse leakage current during forward and reverse biased conditions, respectively. The system designed in UMC $0.18 \\mu \\mathrm {m}$ CMOS technology for Wi-Fi frequency (2.4 GHz). The post layout simulation results shows an efficiency $ \\gt 30\\%$ for input power levels ranging from -24 dBm to -10 dBm while driving a load of $40 \\mathrm {K}\\Omega.$","PeriodicalId":112526,"journal":{"name":"2018 16th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 16th IEEE International New Circuits and Systems Conference (NEWCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEWCAS.2018.8585489","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a hybrid single-feed CMOS rectifier for RF energy harvesting at 2.4 GHz. The proposed system achieves high power conversion efficiency across a wide input power range by reconfiguring the power paths. The architecture incorporates 3-stage reconfigurable hybrid rectifiers and each stage as regular Vth MOS rectifier for high input power and low Vth MOS rectifier for low input power. Both the rectifiers are connected in a cross-coupled manner which results in small ON-resistance and low reverse leakage current during forward and reverse biased conditions, respectively. The system designed in UMC $0.18 \mu \mathrm {m}$ CMOS technology for Wi-Fi frequency (2.4 GHz). The post layout simulation results shows an efficiency $ \gt 30\%$ for input power levels ranging from -24 dBm to -10 dBm while driving a load of $40 \mathrm {K}\Omega.$