J. Scott, F. Morrison, Y. K. Hoo, A. Milliken, H. Fan, S. Kawasaki, M. Miyake, T. Tatsuta, O. Tsuji
{"title":"Ferroelectric Thin-Film Devices: Failure Mechanisms and New Prototype Nano-Structures","authors":"J. Scott, F. Morrison, Y. K. Hoo, A. Milliken, H. Fan, S. Kawasaki, M. Miyake, T. Tatsuta, O. Tsuji","doi":"10.1109/ISAF.2007.4393150","DOIUrl":null,"url":null,"abstract":"Several fundamental physics problems concerning ferroelectric thin films are discussed with direct application to industry problems. The first is a model of dielectric breakdown under d.c. voltage stressing, extended from single capacitor films to multilayer capacitors (MLCs). The second is an analysis of flash-over (arcing) breakdown in MLCs, including those with base metal electrodes (Ni). The third is the demonstration that any equivalent circuit model for real ferroelectric memories (FRAMs) must include a constant phase element (CPE). We then consider novel new prototype devices with industry potential for commercialization: three-dimensional [3D] DRAM capacitor trenches; piezoelectric nanotubes; and carbon nano-wire arrays with ferroelectric tips.","PeriodicalId":321007,"journal":{"name":"2007 Sixteenth IEEE International Symposium on the Applications of Ferroelectrics","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 Sixteenth IEEE International Symposium on the Applications of Ferroelectrics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISAF.2007.4393150","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Several fundamental physics problems concerning ferroelectric thin films are discussed with direct application to industry problems. The first is a model of dielectric breakdown under d.c. voltage stressing, extended from single capacitor films to multilayer capacitors (MLCs). The second is an analysis of flash-over (arcing) breakdown in MLCs, including those with base metal electrodes (Ni). The third is the demonstration that any equivalent circuit model for real ferroelectric memories (FRAMs) must include a constant phase element (CPE). We then consider novel new prototype devices with industry potential for commercialization: three-dimensional [3D] DRAM capacitor trenches; piezoelectric nanotubes; and carbon nano-wire arrays with ferroelectric tips.