Area optimization of cryptographic algorithm on less dense reconfigurable platform

Abstract

Reconfigurable computing has grown to become a large and important field of research. Implementing network security algorithms on reconfigurable platform provides major benefits over VLSI and software platforms since they offers high speed similar to VLSI and high flexibility similar to software platforms. The paper presents efficient implementation of DES algorithm on XC25200 FPGA. The synthesis result shows that with this kind of implementation only 2118 slices and 97 number of bonded IOBs are utilized as compared to 2151 slices and 186 number of bonded IOBs with normal implementation.