Victoria Baker, B. Fan, R. Burgos, V. Blasko, Warren Chen
{"title":"3D Commutation-Loop Design Methodology for a Silicon-Carbide Based 15 kW, 380:480 V Matrix Converter with PCB Aluminum Nitride Cooling Inlay","authors":"Victoria Baker, B. Fan, R. Burgos, V. Blasko, Warren Chen","doi":"10.1109/ECCE44975.2020.9236072","DOIUrl":null,"url":null,"abstract":"Wide-bandgap devices like silicon-carbide (SiC) MOSFETs and gallium nitride (GaN) HEMTs feature fast switching speed, low switching losses, and higher operating temperatures. However, with the high di/dt and dv/dt slew rates, even small stray inductances and capacitances can lead to greater overvoltages and ringing during switching transients. Therefore, commutation loop parasitics are critical for SiC and GaN implementations. This paper details the theoretical analysis, and finite element analysis (FEA) simulation comparisons of different 3D Printed Circuit Board (PCB) layout strategies developed for a 15 kW SiC three-phase matrix converter. A discussion and evaluation of device cooling methods to increase the power density of the converter is also included, where each method defines specific constraints on the PCB layout design. Specifically, the use of PCB thermal vias and embedded Aluminum Nitride (AlN) ceramic inserts is evaluated. The latter resulting in a total power loop inductance of 22.8 nH, including device parasitics, and a thermal resistance of 2.7 °C/W.","PeriodicalId":433712,"journal":{"name":"2020 IEEE Energy Conversion Congress and Exposition (ECCE)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Energy Conversion Congress and Exposition (ECCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCE44975.2020.9236072","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Wide-bandgap devices like silicon-carbide (SiC) MOSFETs and gallium nitride (GaN) HEMTs feature fast switching speed, low switching losses, and higher operating temperatures. However, with the high di/dt and dv/dt slew rates, even small stray inductances and capacitances can lead to greater overvoltages and ringing during switching transients. Therefore, commutation loop parasitics are critical for SiC and GaN implementations. This paper details the theoretical analysis, and finite element analysis (FEA) simulation comparisons of different 3D Printed Circuit Board (PCB) layout strategies developed for a 15 kW SiC three-phase matrix converter. A discussion and evaluation of device cooling methods to increase the power density of the converter is also included, where each method defines specific constraints on the PCB layout design. Specifically, the use of PCB thermal vias and embedded Aluminum Nitride (AlN) ceramic inserts is evaluated. The latter resulting in a total power loop inductance of 22.8 nH, including device parasitics, and a thermal resistance of 2.7 °C/W.