Improved power hardware in the loop interface methods via impedance matching

S. Paran, C. Edrington
{"title":"Improved power hardware in the loop interface methods via impedance matching","authors":"S. Paran, C. Edrington","doi":"10.1109/ESTS.2013.6523758","DOIUrl":null,"url":null,"abstract":"The power hardware in the loop (PHIL) method is a reliable simulation and validation technology. It can be utilized to augment the test of electrical, mechanical or electromechanical components or subsystems with high power ratings. In addition, it can also be used to characterize their behavior when connected to some complex electrical networks or mechanical environment. Reliable and safe performances are paramount in a PHIL system. Thus, the proper PHIL modeling and power interface validation precedes any experimental implementation. In this paper, we focus on the stability and accuracy of the damping impedance method (DIM) and we propose the modified DIM method which increases the accuracy and the stability of the PHIL through dynamic impedance matching of the load and the linking impedance component. Different cases are introduced in order to study the parameters which have effects on the PHIL system. First, the basic DIM method and the modified DIM architecture are introduced, and then two cases consisting of a constant load and a variable load will be presented, respectively.","PeriodicalId":119318,"journal":{"name":"2013 IEEE Electric Ship Technologies Symposium (ESTS)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-04-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"43","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE Electric Ship Technologies Symposium (ESTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESTS.2013.6523758","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 43

Abstract

The power hardware in the loop (PHIL) method is a reliable simulation and validation technology. It can be utilized to augment the test of electrical, mechanical or electromechanical components or subsystems with high power ratings. In addition, it can also be used to characterize their behavior when connected to some complex electrical networks or mechanical environment. Reliable and safe performances are paramount in a PHIL system. Thus, the proper PHIL modeling and power interface validation precedes any experimental implementation. In this paper, we focus on the stability and accuracy of the damping impedance method (DIM) and we propose the modified DIM method which increases the accuracy and the stability of the PHIL through dynamic impedance matching of the load and the linking impedance component. Different cases are introduced in order to study the parameters which have effects on the PHIL system. First, the basic DIM method and the modified DIM architecture are introduced, and then two cases consisting of a constant load and a variable load will be presented, respectively.
通过阻抗匹配改进了电源硬件在环接口方法
电源硬件在环(PHIL)方法是一种可靠的仿真验证技术。它可以用来增加高额定功率的电气、机械或机电部件或子系统的测试。此外,它还可以用来表征它们在连接到一些复杂的电气网络或机械环境时的行为。在PHIL系统中,可靠和安全的性能至关重要。因此,适当的PHIL建模和电源接口验证先于任何实验实现。本文重点研究了阻尼阻抗法(DIM)的稳定性和准确性,提出了改进的DIM方法,通过负载与连接阻抗分量的动态阻抗匹配,提高了PHIL的精度和稳定性。介绍了不同的实例,研究了各参数对PHIL系统的影响。首先介绍了DIM的基本方法和改进后的DIM结构,然后分别介绍了恒载和变载两种情况。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信