Implementation and Analysis of Hybrid DRAM PUFs on FPGA

Abstract

The widespread application of embedded devices has attracted great concern about device security issues. Silicon physical unclonable functions (PUFs) have been proven to be a low-cost and effective hardware-based solution to ensure the security of embedded devices. Among many schemes, DRAM-based PUF is an attracted option for the reason that DRAM is ubiquitous in embedded devices and has a large address space. However, the existing DRAM PUF schemes have some defects, such as low PUF response reliability and complex key post-processing operations. Therefore, this paper presents a hybrid DRAM PUF composed of PicoPUF and DRAM PUF to address these problems. We implement the proposed hybrid DRAM PUFs on Xilinx Kintex 7 FPGA board and validate the effectiveness of our scheme. The experimental results show that compared to current DRAM PUFs, the proposed scheme can generate PUF responses with improved reliability and reduce the key post-process procedure.