The Gauss machine: A Galois-enhanced quadratic residue number system systolic array

Abstract

The Gauss machine is a SIMD systolic array architecture that takes advantage of the Galois-enhanced residue number system (GEQRNS) to form reduced-complexity arithmetic elements. The Gauss machine is targeted at front-end signal and image processing applications. A discrete prototype that achieves a peak rating of 320 million complex arithmetic operations per second while operating at 10 MHz has been constructed. A VLSI implementation of the Gauss machine's processor cell has been created. The VLSI implementation is implemented in 2.0-/spl mu/m CMOS and achieves greater than 20-MHz performance, using less than 2.0-mm/sup 2/ die area. It is shown that techniques for defect tolerance in RNS systolic arrays can result in substantial yield enhancement, thereby making larger than conventional (ULSI) systems possible.<>