4-π Crosstalk noise model for deep submicron VLSI global RC interconnects

V. Maheshwari, N. Joshi, Anushree, R. Kar, D. Mandal, A. Bhattacharjee
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引用次数: 2

Abstract

This paper presents an improved, highly accurate and efficient complete analytical 4-π crosstalk noise model which incorporates all physical properties such as victim and aggressor drivers, coupling locations in both lines (victim and aggressor) and distributed RC characteristics of on-chip VLSI interconnects. In this paper, various noise avoidance approaches are explained. Sensitivity expressions of parameters to peak noise and noise width are also used in this explanation. The analysis and evaluation of the parameters are done using the proposed model. In the explanation of crosstalk noise model various driver/interconnect parameters are included as done in any sensitivity based noise avoidance approach.
深亚微米VLSI全局RC互连的4-π串扰噪声模型
本文提出了一种改进的、高精度和高效的完整解析型4-π串扰噪声模型,该模型结合了片上VLSI互连的所有物理特性,如受害者和侵略者驱动器、两线(受害者和侵略者)中的耦合位置以及分布式RC特性。本文介绍了各种噪声避免方法。在这个解释中也使用了参数对峰值噪声和噪声宽度的灵敏度表达式。利用所提出的模型对参数进行了分析和评价。在串扰噪声模型的解释中,包括各种驱动器/互连参数,就像在任何基于灵敏度的噪声避免方法中一样。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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