{"title":"Behavioral description of quantum V and V+ gates to design quantum logic circuits","authors":"M. Mohammadi, M. Eshghi","doi":"10.1109/SSD.2008.4632850","DOIUrl":null,"url":null,"abstract":"Quantum gates which are represented by unitary matrices have potentials to implement reversible logic circuits. V and V+ gates are two well known quantum gates which are used to synthesize the reversible logic circuits. In this paper we have used behavioral description of these gates, instead of unitary matrix description, to synthesize reversible logic circuits. By this method, V and V+ gates are shown in the truth table form. Results show that bigger circuits with more number of gates can be synthesized using proposed method. Some benchmarks of reversible logic circuits are also optimized and compared to other works.","PeriodicalId":267264,"journal":{"name":"2008 5th International Multi-Conference on Systems, Signals and Devices","volume":"228 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 5th International Multi-Conference on Systems, Signals and Devices","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SSD.2008.4632850","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
Quantum gates which are represented by unitary matrices have potentials to implement reversible logic circuits. V and V+ gates are two well known quantum gates which are used to synthesize the reversible logic circuits. In this paper we have used behavioral description of these gates, instead of unitary matrix description, to synthesize reversible logic circuits. By this method, V and V+ gates are shown in the truth table form. Results show that bigger circuits with more number of gates can be synthesized using proposed method. Some benchmarks of reversible logic circuits are also optimized and compared to other works.