A 1.75 GHz inductor-less CMOS low noise amplifier with high-Q active inductor load

Abstract

A 1.75 GHz CMOS inductor-less low noise amplifier with high-Q active inductor load using 0.35 /spl mu/m standard CMOS digital process is presented. In this low noise amplifier, the compact tunable high-Q active inductor load is connected to the common-gate configuration to improve the performance of the high power gain, low power consumption and simple matching characteristics. Not using any passive components results in a reduction of the area of chip and the complexity. HSPICE simulation has been performed to verify the performance of the designed low noise amplifier. It has been shown that the amplifier has a power gain of 24 dB(S21), S11 of -31 dB, S12 of -38.5 dB and S22 of -21.4 dB under 3.3 V power supply with 9.3 mW power consumption around at 1.75 GHz center frequency. The experimental chip fabricated occupies 0.057/spl times/0.056 mm/sup 2/ chip area.