Figure of merit based design strategy for low-power continuous-time /spl Sigma//spl Delta/ modulators

Abstract

This paper presents a novel design strategy for low-power continuous-time (CT) /spl Sigma//spl Delta/ modulators. The figure of merit (FOM) is used to find the optimal /spl Sigma//spl Delta/ modulator implementation with respect to a minimal power consumption on the one hand and to fulfil a rapid prototyping approach on the other hand. This method compares the power efficiency of different modulator structures and modulator orders with respect to the given design specifications. The efficiency of this strategy is shown by measurement results of a 1.5V 3/sup rd/ order CT modulator.