A CNFET-based characterization framework for digital circuits

J. Athow, C. Rozon, D. Al-Khalili, J. Langlois
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引用次数: 0

Abstract

This paper introduces a framework to develop and characterize digital circuits using Carbon Nanotube Field Effect Transistors (CNFET). We define a 4-step process that involves design capture, pre-processing, circuit simulation and results extraction and interpretation. The initial work leading to this framework involves the selection of appropriate CNFET model and model parameters, and determination of optimized substrate voltage. Through a set of custom-design automated scripts, various logic gates were simulated, data were compiled and characterization results were obtained. A complete approximate squarer circuit was also designed, implemented and characterized using the framework. To demonstrate the power of Carbon Nanotube technology, the same circuit was also implemented in 16 nm CMOS technology for comparison. An improvement by factor of 17× in PDP was achieved with CNT.
基于cnfet的数字电路表征框架
本文介绍了一种利用碳纳米管场效应晶体管(CNFET)开发和表征数字电路的框架。我们定义了一个包括设计捕获、预处理、电路仿真以及结果提取和解释的4步过程。该框架的初始工作包括选择合适的CNFET模型和模型参数,以及确定优化的衬底电压。通过一套自定义设计的自动化脚本,对各种逻辑门进行了仿真,并对数据进行了编译,得到了表征结果。利用该框架设计、实现了一个完整的近似平方电路,并对其进行了表征。为了证明碳纳米管技术的强大功能,同样的电路也在16纳米CMOS技术中实现以进行比较。碳纳米管的PDP提高了17倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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