Characterization of trench isolation for BiCMOS technologies

Abstract

We have developed and characterized new test structures for deep trench isolation in deep submicron BiCMOS technologies. These structures enable accurate characterization of the influence of trench isolation on device performance, without the necessity of fully processed lots. In particular capacitances, breakdown and leakage mechanisms can be investigated. This paper discusses the test structures, measurement methods (in particular separation of capacitance contributions) as well as some technological conclusions that were derived from measurement results that were obtained with the test structures.