Staggered Metallization with Air gaps for Independently Tuned Interconnect Resistance and Capacitance

Abstract

An innovative 300mm process architecture that improves interconnect resistance and capacitance is presented. Test structures patterned in novel geometries that lower wiring RC are fabricated, and electrical measurements are compared to simulated values from material and geometrical parameters. Circuit studies with representative examples of such interconnects were performed to quantify the benefit in microprocessor performance and power.