Arghavan Asad, A. E. Zonouz, M. Seyrafi, M. Soryani, M. Fathy
{"title":"Modeling and Analyzing of Blocking Time Effects on Power Consumption in Network-on-Chips","authors":"Arghavan Asad, A. E. Zonouz, M. Seyrafi, M. Soryani, M. Fathy","doi":"10.1109/ReConFig.2009.48","DOIUrl":null,"url":null,"abstract":"Networks-on-Chip (NoC) has been proposed as an only efficient and scalable solution for providing global on-chip communications in any large VLSI design. Simultaneously, power dissipation issues have grown to such importance that they now constrain attainable performance. The large value of power consumption, relative to the active power, can therefore have serious implications for the feasibility of deploying NoCs. If NoCs are to be accepted, their full power implications need to be known. Moreover, these power characteristics must be accurately understood across the large possible design space of NoCs. Blocking time is one of the effective factors on NoC power consumption. In this paper we present a Markovian model for evaluating the amount of the dissipated power comes from packet blocking and show the blocking time effects on total power consumption of on-chip networks approach.","PeriodicalId":325631,"journal":{"name":"2009 International Conference on Reconfigurable Computing and FPGAs","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Conference on Reconfigurable Computing and FPGAs","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ReConFig.2009.48","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Networks-on-Chip (NoC) has been proposed as an only efficient and scalable solution for providing global on-chip communications in any large VLSI design. Simultaneously, power dissipation issues have grown to such importance that they now constrain attainable performance. The large value of power consumption, relative to the active power, can therefore have serious implications for the feasibility of deploying NoCs. If NoCs are to be accepted, their full power implications need to be known. Moreover, these power characteristics must be accurately understood across the large possible design space of NoCs. Blocking time is one of the effective factors on NoC power consumption. In this paper we present a Markovian model for evaluating the amount of the dissipated power comes from packet blocking and show the blocking time effects on total power consumption of on-chip networks approach.