A low-power, 3-5-GHz CMOS UWB LNA using transformer matching technique

Dong-Hun Shin, Jaejin Park, C. Yue
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引用次数: 40

Abstract

This paper presents the design of a 3-5-GHz CMOS ultra-wideband (UWB) Iow-noise amplifier (LNA) utilizing an on-chip transformer to achieve low-power operation and to realize a compact input matching network. Detailed analyses of the input match, voltage gain, and noise figure of the LNA are provided. Implemented in 0.13-mum CMOS, the LNA achieves a maximum power gain of 16.2 dB, an input return loss of greater than 11.0 dB, and a minimum noise figure of 2.8 dB for the 3-5-GHz UWB while consuming only 6.7 mW from a 1.2-V supply. The active area of the fabricated CMOS UWB LNA is 0.32 mm2.
采用变压器匹配技术的低功耗3-5 ghz CMOS超宽带LNA
本文设计了一种3-5 ghz CMOS超宽带(UWB)低噪声放大器(LNA),利用片上变压器实现低功耗工作和紧凑的输入匹配网络。详细分析了LNA的输入匹配、电压增益和噪声系数。在0.13 μ m CMOS中实现,LNA在3-5 ghz超宽带下的最大功率增益为16.2 dB,输入回波损耗大于11.0 dB,最小噪声系数为2.8 dB,而1.2 v电源的功耗仅为6.7 mW。所制备的CMOS超宽带LNA的有源面积为0.32 mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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