Analysis and Evaluation of Active/Hybrid/Passive dv/dt-Filter Concepts for Next Generation SiC-Based Variable Speed Drive Inverter Systems

M. Haider, M. Guacci, D. Bortis, J. Kolar, Y. Ono
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引用次数: 9

Abstract

State-of-the-art variable speed drive inverter systems are typically employing 1200 V Si IGBTs with antiparallel freewheeling diodes, resulting in a large overall semiconductor chip area, relatively high switching losses and/or low switching frequencies, and causing a substantial on-state voltage drop in both current directions, which inherently limits the peak and part-load efficiency. SiC MOSFETs are seen as natural future replacement of Si IGBTs, since they benefit from high switching speeds and low on-state resistances, which drastically reduces switching and conduction losses. However, the high switching speed of SiC devices results in a dv/dt-stress on the motor windings of up to 60...80 V/ns, which must be limited to 3...6 V/ns in order to prevent partial discharge phenomena and/or progressive insulation aging. Full sinewave filtering could solve this issue, but would also reduce the achievable performance improvement, as a higher switching frequency and/or a bulky filter would be required. Therefore, this paper comparatively evaluates different dv/dt-limitation approaches proposed in literature, i.e. active, hybrid and passive filter concepts, for a next generation 10kW SiC PWM inverter supplied from an 800V DC-bus. First, the different filter concepts are described and analyzed, and in a second step their design procedure is explained based on the design space approach. Afterwards, a Pareto optimization is conducted and Pareto optimal designs are selected, evaluated and compared regarding efficiency and power density. All considered filter designs outperform a state-of-the-art typically 98.3% efficient IGBT inverter drive. The hybrid filter enables a part-load (at 8 kW) efficiency of 99.0% for a dv/dt limited to 6 V/ns. If higher dv/dt -values can be tolerated, e.g. 12 V/ns, 99.3% part-load efficiency with a power density above 80 kW/L can be achieved by the active concept.
新一代基于sic的变速驱动逆变系统中有源/混合/无源dv/dt滤波器概念的分析与评价
最先进的变速驱动逆变系统通常采用1200 V Si igbt和反平行自由旋转二极管,导致整体半导体芯片面积大,相对较高的开关损耗和/或低开关频率,并导致两个电流方向上的大量导通状态电压下降,这固有地限制了峰值和部分负载效率。SiC mosfet被视为Si igbt的自然替代品,因为它们受益于高开关速度和低导通状态电阻,从而大大降低了开关和传导损失。然而,SiC器件的高开关速度导致电机绕组上的dv/dt应力高达60…80V/ns,必须限制在3V/ns,以防止局部放电现象和/或逐渐老化的绝缘。全正弦波滤波可以解决这个问题,但也会降低可实现的性能改进,因为需要更高的开关频率和/或笨重的滤波器。因此,本文比较评估了文献中提出的不同dv/dt限制方法,即有源、混合和无源滤波器概念,用于由800V直流母线供电的下一代10kW SiC PWM逆变器。首先,描述和分析了不同的滤波器概念,第二步,基于设计空间方法解释了它们的设计过程。然后进行帕累托优化,从效率和功率密度两个方面对帕累托最优设计进行选择、评价和比较。所有考虑的滤波器设计都优于最先进的典型98.3%效率的IGBT逆变器驱动器。混合滤波器在dv/dt限制为6 V/ns的情况下,使部分负载(8 kW)效率达到99.0%。如果可以容忍更高的dv/dt值,例如12 V/ns,则可以通过有源概念实现功率密度高于80 kW/L的部分负载效率达到99.3%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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