Hardware Support to Improve Fuzzing Performance and Precision

Ren Ding, Yonghae Kim, F. Sang, Wen Xu, Gururaj Saileshwar, Taesoo Kim
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引用次数: 5

Abstract

Coverage-guided fuzzing is considered one of the most efficient bug-finding techniques, given its number of bugs reported. However, coverage tracing provided by existing software-based approaches, such as source instrumentation and dynamic binary translation, can incur large overhead. Hindered by the significantly lowered execution speed, it also becomes less beneficial to improve coverage feedback by incorporating additional execution states. In this paper, we propose SNAP, a customized hardware platform that implements hardware primitives to enhance the performance and precision of coverage-guided fuzzing. By sitting at the bottom of the computer stack, SNAP leverages the existing CPU pipeline and micro-architectural features to provide coverage tracing and rich execution semantics with near-zero cost regardless of source code availability. Prototyped as a synthesized RISC-V BOOM processor on FPGA, SNAP incurs a barely 3.1% tracing overhead on the SPEC benchmarks while achieving a 228x higher fuzzing throughput than the existing software-based solution. Posing only a 4.8% area and 6.5% power overhead, SNAP is highly practical and can be adopted by existing CPU architectures with minimal changes.
硬件支持,提高模糊性能和精度
考虑到报告的bug数量,覆盖率引导的模糊测试被认为是最有效的bug发现技术之一。然而,由现有的基于软件的方法提供的覆盖跟踪,比如源代码检测和动态二进制翻译,可能会产生很大的开销。由于执行速度明显降低,通过合并额外的执行状态来改进覆盖率反馈也变得不那么有益。在本文中,我们提出了一个定制的硬件平台SNAP,该平台实现了硬件原语,以提高覆盖引导模糊的性能和精度。通过位于计算机堆栈的底部,SNAP利用现有的CPU管道和微体系结构特性,以几乎为零的成本提供覆盖跟踪和丰富的执行语义,而不管源代码是否可用。作为FPGA上的合成RISC-V BOOM处理器的原型,SNAP在SPEC基准测试中产生的跟踪开销仅为3.1%,同时实现了比现有基于软件的解决方案高228x的模糊吞吐量。SNAP仅占4.8%的面积和6.5%的功耗开销,非常实用,可以通过最小的更改被现有的CPU架构采用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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