An on-chip learning, low-power probabilistic spiking neural network with long-term memory

Abstract

This paper describes an analog probabilistic spiking neural network (PSNN) circuit for portable and implanted applications which especially require low power, small area and on-chip learning to ensure good mobility, body safety and continually accurate classification. The circuit is implemented using TSMC 0.18μm CMOS technology. Simulation results show that the circuit can learn linearly non-separable exclusive-or (xor) problem under 1V supply with only 3.8μW of power consumption. Long-term, multi-stage synaptic memory contains more information for a longer time in a single synapse. Comparison of the proposed PSNN with recent hardware neural networks is also provided.