{"title":"Target detection algorithm based on CNN and its FPGA implementation","authors":"Yan Yan, Yonghui Zhang, Jian Zhang, Ruonan Liu","doi":"10.1145/3461353.3461385","DOIUrl":null,"url":null,"abstract":"When the deep learning algorithm is deployed on FPGA platform, it is difficult to deploy different network structures with a single hardware structure. The iteration of the algorithm becomes complex and increases the iteration time. Aiming at these problems of Deploying deep learning algorithm on FPGA platforms, This paper presents a neural network accelerator based on FPGA, the proposed accelerator has high adaptability to different networks, the accelerator beneficial to accelerate and optimize the hardware of convolutional neural network for image recognition, efficiently use the limited resources on FPGA chip to realize the calculation of large-scale convolutional neural network, our work explores a high-performance, low-power and low-cost embedded solution for image recognition applications. Finally, this paper takes the Xilinx FPGA platform ultra96v2 as the hardware platform, we realizes the deployment of the accelerator on the FPGA platform, implements and verifies the yolov3 algorithm on the platform and achieves good detection results.","PeriodicalId":114871,"journal":{"name":"Proceedings of the 2021 5th International Conference on Innovation in Artificial Intelligence","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-03-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2021 5th International Conference on Innovation in Artificial Intelligence","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3461353.3461385","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
When the deep learning algorithm is deployed on FPGA platform, it is difficult to deploy different network structures with a single hardware structure. The iteration of the algorithm becomes complex and increases the iteration time. Aiming at these problems of Deploying deep learning algorithm on FPGA platforms, This paper presents a neural network accelerator based on FPGA, the proposed accelerator has high adaptability to different networks, the accelerator beneficial to accelerate and optimize the hardware of convolutional neural network for image recognition, efficiently use the limited resources on FPGA chip to realize the calculation of large-scale convolutional neural network, our work explores a high-performance, low-power and low-cost embedded solution for image recognition applications. Finally, this paper takes the Xilinx FPGA platform ultra96v2 as the hardware platform, we realizes the deployment of the accelerator on the FPGA platform, implements and verifies the yolov3 algorithm on the platform and achieves good detection results.