Effect of Extended Back Gate in GaAs Based DG- JLMOSFET

Abstract

In this paper, the impact of Extended Back Gate (EBG) length on GaAs based DG-JLMOSFET is simulated to analyze its superior behaviors in contrast with conventional DG- JLMOSFETs. For determining the optimal performance of EBG in DG-JLMOSFET, the back gate is extended symmetrically from gate towards source and drain sides for several distinct lengths ranging from 10 nm to 20 nm. For both top and back gates HfO2 is taken as the gate oxide material and the oxide thickness is considered as 1 nm. For a fixed channel length of 10 nm, the suggested model displays that when gate length is increased the impact of the drain voltage on the drain current is diminished resulting significant decrease in OFF-state current with a larger Ion/Ioff ratio of ~ 109. In fact, this leads to a reduced drain induced barrier lowering. Moreover, numerous simulated results from SILVACO ATLAS TCAD offers larger drain current as well as lower subthreshold swing of 67.5 mV/Dec for the proposed model. Due to its superior performance over traditional DG-JLMOSFET, the proposed structure can be deployed effectively in the near future.