Multiprocessor scheduling with a priori node assignment

V. Zivojnovic, H. Koerner, H. Meyr
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引用次数: 13

Abstract

Compile-time scheduling of DSP programs on multiprocessor systems is discussed. Contrary to standard approaches, a complete, a priori node assignment is supposed. The assumption is justified for coarse-grain DSP programs on heterogeneous programmable architectures with dedicated memory, I/O or accelerator units. The a priori information about cut arcs is used to apply the retiming transformation for the minimization of the schedule length. Experimental results show that the obtained improvement is worth the additional complexity which is introduced by retiming. At the end, issues related to the implementation of retimed DSP programs are discussed.
具有先验节点分配的多处理器调度
讨论了多处理机系统上DSP程序的编译时调度问题。与标准方法相反,假设有一个完整的、先验的节点分配。该假设适用于具有专用存储器、I/O或加速器单元的异构可编程体系结构上的粗粒度DSP程序。利用切割弧线的先验信息进行重新定时变换,使行程长度最小化。实验结果表明,所获得的改进是值得的,因为重定时带来了额外的复杂性。最后,讨论了重定时DSP程序实现的相关问题。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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