Spreading Diversity in Multi-cell Neutron-Induced Upsets with Device Scaling

E. Ibe, S. Chung, S. Wen, H. Yamaguchi, Y. Yahagi, H. Kameyama, Shigehisa Yamamoto, T. Akioka
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引用次数: 99

Abstract

Recent diversity in multicell upset (MCU) of CMOS SRAMs are reviewed and scaling effects are discussed. Space and time domain automatic classification techniques are developed and applied to single event upsets (SEUs) of 130nm SRAM under quasi-mono energetic neutron irradiation at TSL and CYRIC. Tests show very high dependency of MCU features on data patterns, typically "All `0'/`1'" and checkerboard. Three error propagation categories with 41 modes inherent in device architectures are identified. Novel MCU features, in which errors can be corrected by rewriting but Idd increases stepwise depending on MCU multiplicity, are identified. With "All `0'/`1'" pattern, ratio of double bit error is found to be even higher than that of single bit errors. The majority of the double bit error is in nearest neighborhood (NN) position along word line (WL). Underlining basic mechanism can be either charge collection-diffusion or parasitic bipolar actions. But most features can be elucidated only fully by a novel MCU mechanism MCBI (multi-coupled bipolar interaction) proposed by the authors, giving clues for SEU tolerant sub-100nm design
带器件缩放的多细胞中子诱导扰动中的扩频分集
综述了近年来CMOS sram的多细胞芯片的多样性,并讨论了其缩放效应。在TSL和CYRIC的准单能中子辐照下,研究了130nm SRAM的单事件扰动(SEUs)的空间和时域自动分类技术。测试显示MCU功能对数据模式的依赖性非常高,通常是“所有' 0'/ ' 1'”和棋盘。确定了器件体系结构中固有的41种模式的三种错误传播类别。提出了一种新的MCU特征,即可以通过重写来纠正错误,但Idd会随着MCU的多样性而逐步增加。在“全' 0'/ ' 1'”模式下,双比特误码率甚至高于单比特误码率。双比特误码主要发生在字行(WL)沿线的最近邻(NN)位置。强调基本机制可以是电荷收集-扩散或寄生双极作用。但大多数特性只能通过作者提出的一种新的MCU机制MCBI(多耦合双极相互作用)来充分阐明,这为100nm以下耐SEU设计提供了线索
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